Microchip ATSAMDA1E16B-ABTVAO

ATSAMDA1E16B-ABTVAO General Description

The SAM DA1 ARM® Cortex®-M0+ -based microcontrollers are operating at 48MHz (45DMIPS). The ATSAMDA1E16B provides 64KB Flash, 8kB SRAM and 2KB RWW Flash. The peripheral set for connectivity consists of 4 serial communication modules (SERCOM) that each can be configured to act as a USART, UART, SPI and I²C. Additional connectivity options are provided by the on-chip one channel Inter-IC sound interface (I²S) and the full-speed USB 2.0 embedded host and device.

Supported by MPLAB X IDE and MPLAB Harmony.

Functional Safety
This device supports the ISO 26262 (ASIL B) functional safety standard.
· The Functional Safety Manual, FMEDA and information on the Diagnostic Software are available under NDA through the request form on the 32-bit Microcontrollers Functional Safety web page.
· Learn more about 32-bit MCUs with Functional Safety capabilities including device hardware and certified software libraries.

Features

• ARM Cortex-M0+ CPU running at up to 48MHz
• Single-cycle hardware multiplier
• Micro trace buffer
• 64KB in-system self-programmable Flash
• 2KB Read-While-Write (RWW) Flash section
• 8KB SRAM memory
• Power-on reset (POR) and brown-out detection (BOD)
• Internal and external clock options with 48MHdigital frequency locked loop (DFLL48M) and 48MHto 96MHz
• fractional digital phase locked loop (FDPLL96M)
• External interrupt controller (EIC)
• 16 external interrupts
• One non-maskable interrupt
• Two-pin serial wire debug (SWD) programming, test and debugging interface
• Idle and standby sleep modes
• SleepWalking peripherals
• 8-channel direct memory access controller (DMAC)
• 12-channel event system
• One 16-bit TC with compare/capture channels
• One 8-bit TC with compare/capture channels
• One 32-bit TC with compare/capture channels, by using two TCs
• Up to four compare channels with optional complementary output
• Generation of synchronized pulse width modulation (PWM) pattern across port pins
• Deterministic fault protection, fast decay and configurable dead-time between complementary output
• Dithering for enhancing resolution with up to 5-bit and reduce quantization error
• 32-bit real time counter (RTC) with clock/calendar function
• Watchdog timer (WDT)
• CRC-32 generator
• Device 2.0 and reduced-host low speed and full speed
• Flexible end-point configuration and management with dedicated DMA channels
• On-chip transceivers including pull-ups and serial resistors
• Crystal-less operation in device mode
• USART with full-duplex and single-wire half-duplex configuration
• I2C up to 3.4MHz
• SPI
• LIN Client
• One two-channel inter-IC sound (I2S) interface
• Differential and single-ended input
• 1/2x to 16x programmable gain stage
• Automatic offset and gain error compensation
• Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
• 10-bit, 350ksps digital-to-analog converter (DAC)
• Two analog comparators (AC) with window compare function
• Up to 256-channel capacitive touch and proximity sensing
• 26 GPIO pins
• 32-pin TQFP, QFN
• 2.7V to 3.63V
• –40 to +105°C

Specifications