Microchip ATSAME54P19A-CTUT-EFP

ATSAME54P19A-CTUT-EFP General Description

Security is also a top priority, with integrated hardware security including asymmetric and symmetric crypto hardware acceleration. It is also supported by MPLAB X IDE and MPLAB Harmony, providing a comprehensive development ecosystem. Furthermore, the device supports the ISO 26262 (ASIL B) functional safety standard, with the Functional Safety Manual, FMEDA, and information on the Diagnostic Software available under NDA through the request form on the 32-bit Microcontrollers Functional Safety web page

Features

• ARM Cortex-M4F CPU running at up to 120 MHz
• Floating Point Unit (FPU)
• Embedded Trace Module (ETM) with instruction trace stream
• Core Sight Embedded Trace Buffer (ETB)
• Error Correction Code (ECC)
• Dual bank with Read-While-Write (RWW) support
• EEPROM hardware emulation
• Error Correction Code (ECC) RAM option
• Up to 4 KB of Tightly Coupled Memory (TCM)
• Up to 8 KB additional SRAM with backup retention capability
• Power-on Reset (POR) and Brown-out detection (BOD)
• Internal and external clock options
• External Interrupt Controller (EIC)
• Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
• Five Low Power Modes (Idle, Standby, Hibernate, Backup, and Off )
• Sleep Walking peripherals.
• Battery backup support
• Embedded Buck/LDO regulator supporting on-the-fly selection.
• 65µA/MHz active power consumption.
• Five confidential modes of operation (ECB, CBC, CFB, OFB, CTR)
• True Random Number Generator (TRNG)
• RSA, DSA
• Elliptic Curves Cryptography (ECC) ECC GF(2n), ECC GF(p)
• Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA
• 32-channel Direct Memory Access Controller (DMAC)
• Compatibility with SD and SDHC Memory Card Specification Version 3.01
• Compatibility with SDIO Specification Version 3.0
• Compliant with JDEC specification, MMC memory cards V4.51
• eXecute-In-Place (XIP) support
• Up to 75 MHz SDR operation and DDR support
• Embedded host and device function
• 10/100 Mbps in MII and RMII with dedicated DMA
• IEEE 1588 Precision Time Protocol (PTP) , Time Stamping Unit (TSU) support
• IEEE802.3AZ/AF/PoE energy efficiency support
• Support for 802.1AS and 1588 precision clock synchronization protocol
• Wake on LAN support
• supporting CAN2.0 A/B and CAN-FD 1.0
• USART with full-duplex and single-wire half-duplex configuration
• ISO7816
• I2C up to 3.4MHz
• SPI
• LIN master/slave
• RS485
• SPI inter-byte space
• One two-channel Inter-IC Sound Interface (I2S)
• Up to 14-bit parallel capture mode
• Up to 256 channel capacitive touch and proximity sensing
• 32-channel Event System
• 16-bit ,32-bit or 8-bit TC with two compare/capture channels
• Two 24-bit Timer/Counters for Control (TCC), with extended functions
• Three 16-bit Timer/Counters for Control (TCC), with extended functions
• Up to 5 wake-up pins with tamper detection and de-bouncing filter
• Watchdog Timer (WDT) with Window mode
• CRC-32 generator
• Position Decoder (PDEC)
• Frequency meter (FREQM)
• One Configurable Custom Logic (CCL)
• Differential and single-ended input
• Automatic offset and gain error compensation
• Oversampling and decimation in hardware to support 13-, 14-, 15-, or 16-bit resolution
• Dual 12-bit, 1 MSPS Output Digital-to-Analog Converter (DAC)
• Two Analog Comparators (AC) with Window Compare function
• One temperature sensor
• 99 programmable I/O pins
• 1.71V – 3.6V
• 128-pin TQFP,120-pin TFBGA

Specifications