Microchip DSPIC33EV256GM102-E/MMVAO

DSPIC33EV256GM102-E/MMVAO General Description

Microchip’s dsPIC33EV family of digital signal controllers (DSCs) features a 5V 70 MIPS dsPIC® DSC core with enhanced on-chip features and is ideal for operating in harsh environments such as appliances and automotive applications.The 5V dsPIC33EV family comes with rich peripheral integration which includes CAN, SENT, High Speed PWMs, OP Amps and Error Correcting Code Flash for increased reliability and safety. The dsPIC33EV family of devices enable the design of high-performance, precision motor control systems that are more energy efficient. They can be used to control BLDC, permanent magnet synchronous, AC induction and stepper motors. These devices are ideal for automotive applications and high-performance general  purpose applications. 

The dsPIC33EVXXXGM00X/10X family has manyfeatures that help simplify functional safety certifications for ASIL-Band ASIL-C focused applications including:• Functional Safety Manual and FMEDA available under NDA upon request toyour sales office• MPLAB XC Compiler Functional Safety Manual available with registration • Learn more about our functional safety capabilities including hardware, software, and supporting collateral

Features

• Operating Conditions
• 4.5V to 5.5V, -40ºC to +85ºC, DC to 70 MIPS
• 4.5V to 5.5V, -40ºC to +125ºC, DC to 60 MIPS
• 4.5V to 5.5V, -40ºC to +150ºC, DC to 40 MIPS
• dsPIC33E Core
• Code-Efficient (C and Assembly) Architecture
• Two 40-Bit Wide Accumulators
• Single-Cycle (MAC/MPY) with Dual Data Fetch
• Single-Cycle, Mixed-Sign MUL plus Hardware Divide
• 32-Bit Multiply Support
• Provides a boot Flash segment in addition to the existing general Flash segment
• Error Code Correction (ECC) for Flash
• Added Two Alternate Register Sets for Fast Context Switching
• Up to Six Pulse-Width Modulation (PWM) Outputs (three generators)
• High-Speed PWM
• Primary Master Time Base Inputs allow Time Base Synchronization from Internal/External Sources
• Dead Time for Rising and Falling Edges
• 8.3 ns PWM Resolution at 60 MIPS,
• 16.6 ns Center-Aligned mode at 60 MIPS
• PWM support DC/DC, AC/DC, inverters, Power Factor Correction (PFC) and lighting
• PWM support Brushless Direct Current (BLDC), Permanent Magnet Synchronous Motor (PMSM), AC Induction Motor (ACIM), Switched Reluctance Motor (SRM)
• Programmable Fault inputs
• Flexible trigger configurations for Analog-to-Digital conversion
• Independent Time Base
• Supports PWM lock, PWM output chopping and dynamic phase shifting
• Integrated Analog Features
• ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H
• Up to 36 analog inputs
• Flexible and Independent ADC Trigger Sources
• Up to Four Op Amp/Comparators with Direct Connection to the ADC module:
• Additional dedicated comparator and 7-bit Digital-to-Analog Converter (DAC)
• Programmable references with 128 voltage points
• Programmable blanking and filtering
• Charge Time Measurement Unit
• Supports mTouch™ capacitive touch sensing
• Provides high-resolution time measurement (1 ns)
• On-chip temperature measurement
• Temperature sensor diode
• Multiple sources of edge input triggers
• Timers/Output Compare/Input Capture
• Up to nine general purpose timers
• Five 16-bit or up to two 32-bit timers/counters, Timer3 can provide ADC trigger
• Oscillator Frequency Monitoring through CTMU
• Four Output Capture modules configurable as timers/counters
• Four Input Capture modules
• Communication Interfaces
• CAN module with 32 buffers, 16 filters and three masks
• Support for LIN/J2602 bus support and IrDA®
• High and low speed (SCI)
• 25 Mbps data rate without PPS used
• One I2C™ module (up to 1 Mbaud) with SMBus Support
• Two SENT J2716 (Single Edge Nibble Transmission-Transmit/Receive) module for Automotive Applications
• Direct Memory Access (DMA)
• 4-Channel DMA with User-Selectable Priority Arbitration
• Universal Asynchronous Receiver/Transmitter (UART), Serial Peripheral Interface (SPI), ADC, Input Capture, Output Compare
• Qualification and Class B Support
• AEC-Q100 Grade 1 (-40ºC to +125ºC)
• AEC-Q100 Grade 0 (-40ºC to +150ºC)
• Class B Safety Library, IEC 60730
• Functional Safety Features
• Backup FRC
• Windowed WDT uses LPRC
• Windowed Deadman Timer uses System Clock (System Windowed Watchdog Timer)
• H/W Clock Monitor Circuit
• Dedicated PWM Fault Pin
• Lockable Clock Configuration
• Functional Safety support (ISO26262)
• ASIL-B & ASIL-C focused applications
• FMEDA and Safety manual available under NDA upon request to your sales office
• Safety qualified XC16 compiler
• Functional Safety hardware features
• Flash with Error Correction Code (ECC)
• CodeGuard™ Memory Protection
• On-chip Regulator for CPU
• Backup FRC and redundant clock sources
• Fail Safe Clock Monitor
• Windowed Watchdog Timer (WDT)
• Windowed Deadman Timer (DMT)
• Oscillator Frequency Monitoring through CTMU (OSCI, SYSCLK, FRC, BFRC, LPRC)
• Illegal Opcode Detection
• Analog peripherals redundancies
• Cyclical Redundancy Check (CRC)
• BOR and POR
• PWM Lock and Dedicated PWM Fault Pin
• Internal Loopback to test communication peripherals and IO ports
• SFR and Configuration Locks
• Address Trap
• Math Error Trap
• Redundant data storage for Flash-based Configuration bits and Peripheral Pin Select (PPS) Configuration bits

Specifications