Microchip LAN8672B1T-E/LNX

LAN8672B1T-E/LNX General Description

The Microchip LAN8672 is a compact, low power, and cost-effective single-port 10BASE-T1S Ethernet physical layer transceiver designed according to the IEEE Std 802.3cg-2019^TM specification. The device provides 10 Mbit/s half-duplex transmit and receive capability over single-balanced pair medium such as Unshielded Twisted Pair (UTP) cable. The LAN8672 is designed for use in applications requiring extended temperature range (-40°C to +125°C). The device is also compliant to industrial EMC and EMI requirements. The single power supply and simple analog front end simplifies its integration into small form factor applications.

The LAN8672 allows for the creation of both multidrop and point-to-point network topologies. Point-to-point link segments of up to at least 15m in length are supported. The multidrop mode supports up to at least 8 PHYs connected to a common mixing segment of up to at least 25m in length. The ability to connect multiple PHYs to a common mixing segment reduces weight and implementation costs by reducing cabling and switch ports.

The LAN8672 supports communication with an Ethernet MAC via standard MII interface. An integrated serial management interface (SMI) provides rapid register access and configuration at up to 4 MHz.

Access to the physical medium is managed by CSMA/CD and optionally supplemented by Physical Layer Collision Avoidance (PLCA).

The LAN8672 is designed to be used in functional safety related applications.

Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.

For additional evaluation board information, please contact Microchip Support or Sales.

Features

High-performance 10BASE-T1S Ethernet PHY

Designed according to IEEE Std 802.3cg-2019™
• 10 Mbit/s over single balanced pair
• Half-duplex point-to-point link segments
• Half-duplex multidrop mixing segments

Media Independent Interface (MII) with Serial Management Interface (SMI) for rapid register access

Carrier Sense Multiple Access / Collision Detection (CSMA/CD) media access control

Physical Layer Collision Avoidance (PLCA)
• Allows for high bandwidth utilization by avoiding collisions on the physical layer
• Burst mode for transmission of multiple packets for high packet rate latency-sensitive applications

Enhanced electromagnetic compatibility / electromagnetic interference (EMC/EMI) performance

Single 3.3V supply

Small footprint 36-pin VQFN packaging (6 x 6 mm) with wettable flanks

-40°C to +125°C extended temperature range

Microchip Functional Safety Ready

Specifications