ST STM32F429NIH6J

STM32F429NIH6J General Description

Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructionsMemoriesUp to 2 MB of Flash memory organized into two banks allowing read-while-writeUp to 256+4 KB of SRAM including 64-KB of CCM (core coupled memory) data RAMFlexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, Compact Flash/NOR/NAND memoriesLCD parallel interface, 8080/6800 modesLCD-TFT controller with fully programmable resolution (total width up to 4096 pixels, total height up to 2048 lines and pixel clock up to 83 MHz)Chrom-ART Accelerator™ for enhanced graphic content creation (DMA2D)Clock, reset and supply management1.7 V to 3.6 V application supply and I/OsPOR, PDR, PVD and BOR4-to-26 MHz crystal oscillatorInternal 16 MHz factory-trimmed RC (1% accuracy)32 kHz oscillator for RTC with calibrationInternal 32 kHz RC with calibrationSleep, Stop and Standby modesVBATsupply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAMLow powerSleep, Stop and Standby modesVBATsupply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode2×12-bit D/A convertersGeneral-purpose DMA: 16-stream DMA controller with FIFOs and burst supportUp to 17 timers: up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder inputDebug modeSWD & JTAG interfacesCortex-M4 Trace Macrocell™Up to 168 I/O ports with interrupt capabilityUp to 164 fast I/Os up to 90 MHzUp to 166 5 V-tolerant I/OsUp to 21 communication interfacesUp to 3 × I2C interfaces (SMBus/PMBus)Up to 4 USARTs/4 UARTs (11.25 Mbit/s, ISO7816 interface, LIN, IrDA, modem control)Up to 6 SPIs (45 Mbits/s), 2 with muxed full-duplex I2S for audio class accuracy via internal audio PLL or external clock1 x SAI (serial audio interface)2 × CAN (2.0B Active) and SDIO interfaceAdvanced connectivityUSB 2.0 full-speed device/host/OTG controller with on-chip PHYUSB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII8- to 14-bit parallel camera interface up to 54 Mbytes/sTrue random number generatorCRC calculation unitRTC: subsecond accuracy, hardware calendar96-bit unique IDSTM32F4 System View DescriptionSTM32F4 System View Description1.8STM32F427/437 and STM32F429/439 IBIS modelsSTM32F427/437 and STM32F429/439 IBIS models1.0STM32F427/437 and STM32F429/439 Boundary Scan Description Language (BSDL) filesSTM32F427/437 and STM32F429/439 Boundary Scan Description Language (BSDL) files1.0

Specifications